This document is a comprehensive textbook on Digital Logic Design authored by Izad Khormaee. It covers fundamental concepts of digital logic, including number systems, Boolean algebra, and combinational logic circuits. The book is structured into chapters that delve into various topics such as flip-flops, sequential circuits, and state machines. It also discusses design methodologies and practical applications of digital systems. The content is designed for students and professionals in electrical engineering and computer science, making it a valuable resource for both learning and reference. The document includes problem sets, examples, and additional resources to enhance understanding. Published in 2014, this edition serves as an essential guide for those studying digital logic design.
Digital Logic Design
Version 4.8 printed on April 2018
First published on August 2006
Digital Logic Design Page 2
Background and Acknowledgements
This material has been developed for the first course in Digital Logic Design. The content is derived from
the author’s educational, technical and management experiences, in-addition to teaching experience.
Many other sources, including the following specific sources, have also informed by the content and
format of the following material:
Katz, R. Contemporary Logic Design. (2005) Pearson.
Wakerly, I. Digital Design. (2006) Prentice Hall.
Sandige, R. Digital Design Essentials. (2002) Prentice Hall.
Nilsson, J. Electrical Circuits. (2004) Pearson.
I would like to give special thanks to my students and colleagues for their valued contributions in making
this material a more effective learning tool.
I invite the reader to forward any corrections, additional topics, examples and problems to me for future
Thanks,
Izad Khormaee
www.EngrCS.com
© 2014 Izad Khormaee, All Rights Reserved.
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Contents
Chapter 1. Number Systems, Number Representations, and Codes ................................................ 6
1.1. Key concepts and Overview ............................................................................................................. 6
1.2. Digital vs. Analog .............................................................................................................................. 7
1.3. Digital Design Overview (from Transistor to Super Computer) ........................................................ 9
1.4. Design Methodologies .................................................................................................................... 11
1.5. Number Systems (Decimal, Binary, Octal, Hexadecimal) .............................................................. 12
1.6. Base Conversions ........................................................................................................................... 14
1.7. Signed Binary Number Conventions .............................................................................................. 17
1.8. Binary Arithmetic ............................................................................................................................. 20
1.9. Binary Codes .................................................................................................................................. 22
1.10. DC Electrical Circuit Fundamentals .............................................................................................. 24
1.11. Additional Resources .................................................................................................................... 28
1.12. Problems ....................................................................................................................................... 29
Chapter 2. Boolean Algebra, Functions, and Minimization .............................................................. 30
2.1. Key concepts and Overview ........................................................................................................... 30
2.2. Logic Gates ..................................................................................................................................... 31
2.3. Huntington’s First Set of Postulates ............................................................................................... 34
2.4. Principle of Duality .......................................................................................................................... 35
2.5. Boolean Functions .......................................................................................................................... 36
2.6. Boolean Algebra Theorems ............................................................................................................ 38
2.7. Canonical or Standard Form of Functions ....................................................................................... 41
2.8. Methods of Function Minimization (reducing the number of literals in an expression) .................. 46
2.9. Karnaugh-map or K-map ................................................................................................................ 48
2.10. Special Case: “Don’t Care” Terms ................................................................................................ 52
2.11. XOR Properties and Applications ................................................................................................. 53
2.12. Additional Resources .................................................................................................................... 54
2.13. Problems ....................................................................................................................................... 55
Chapter 3. Analyzing and Synthesizing Combinational Logic Circuits .......................................... 56
3.1. Key concepts and Overview ........................................................................................................... 56
3.2. Standard Logic and Schematic Layout (Review) ........................................................................... 57
3.3. Designing Logic Circuits ................................................................................................................. 62
3.4. Combinational Logic Analysis and Design ..................................................................................... 66
3.5. Compressing Truth Tables and K-maps ......................................................................................... 67
3.6. Glitches and Their Causes ............................................................................................................. 71
3.7. Types of Functions and Delays ...................................................................................................... 74
3.8. Beyond Standard Logic: Applications ............................................................................................. 76
3.9. Programmable Logic Devices (PLDs) ............................................................................................ 85
3.10. Additional Resources .................................................................................................................... 94
3.11. Problems ...................................................................................................................................... 95
Chapter 4. Introduction to Feedback Circuits and Sequential Logic Analysis ........................... 96
4.1. Key concepts and Overview ........................................................................................................... 96
4.2. SR Flip-Flops .................................................................................................................................. 97
4.3. Asynchronous Sequential Logic Issues .......................................................................................... 99
4.4. Finite State machine ..................................................................................................................... 101
4.5. Additional Flip Flops ..................................................................................................................... 107
4.6. Sequential Circuit Analysis ........................................................................................................... 112
4.7. Debouncing Mechanical Switches ................................................................................................ 118
End of Document
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